Submodule construction for systems of timed I/O automata*

This paper addresses the problem of designing a submodule of a given system of communicating timed I/O automata. The problem may be formulated mathematically by the equation (C||X)rA under the constraint IX=In, where C represents the specification of the known part of the system, called the context, A represents the specification of the whole system, X represents the specification of the submodule to be constructed, || is a composition operator, r is a conformance relation and In is the required set of inputs for X . As conformance relation, we consider the safe realization relation. This relation is implied by all the well known criteria of trace equivalence, complete trace equivalence, quasi equivalence and reduction. We propose an algorithms for solving the problem with respect to the safe realization and we characterize the set of solutions.